Content addressable memory (CAM) devices, sometimes also referred to as “associative memories”, can provide rapid matching functions between an applied data value (e.g., a comparand, compare data, or search key) and stored data values (e.g., entries). Such rapid matching functions are often utilized in routers, network switches, and the like, to process network packets.
In a conventional CAM device, search operations can be conducted in response to a system clock, with searches being undertaken every clock cycle. As a result, CAM devices can draw considerable current as match lines and/or compare data lines in the CAM cell array are continuously charged and discharged each clock cycle.
One way to address current draw of a CAM device can be to stagger search operations. Two conventional approaches are shown in U.S. Pat. No. 6,240,000 issued to Sywyk et al. on May 29, 2001 and U.S. Pat. No. 6,958,925 issued to Om et al. on Oct. 25, 2005.
Current draw in a CAM device can be problematic in the case of a “cold start” operation. A cold start operation can occur when a CAM device switches from an idle state, in which the various CAM array sections of the device are not operational, to an active state, in which CAM array sections perform various functions, such as a search operation, or the like. Existing conventional approaches can transition from an idle state to a full active state (e.g., search) in a single cycle. This can potentially happen on every other cycle. When a CAM device portion (e.g., a core, array, or block) goes from an idle to an active operation, there can be a very large change in the current requirement for the device. Such a current surge may be too large for the on-chip capacitance to support and can happen too quickly for capacitors on circuit boards associated with the CAM device.
Still further, parasitic inductance of a package containing a CAM device, as well as inductance inherent in a CAM device mounting arrangement, can prevent a fast ramp up of the current, preventing an adequate current supply from being provided when needed by the CAM device.
The above deficiencies can result in a power supply voltage “sag” (i.e., level dip) within the CAM device. In addition, the rapid change in current (dl/dt) through parasitic inductive elements can give rise to ground “bounce” (transient jump in a low supply voltage level), which can further disturb CAM operations. These undesirable variations in supply voltages can adversely impact performance, and are often referred to as “cold start” failures or problems.
Still further, newer generation CAM devices can have the capability of directing searches to selected blocks within a CAM device. In such applications, the current draw requirement between different searches can be considerable, as one search could potentially search one block while a subsequent search could search all blocks. Such applications can have the same essential problems as a cold start case, having to accommodate substantial current rate changes (dl/dt).
Another approach to limiting current surges includes changing search key bits every cycle to thereby control dl/dt changes during idle cycles. Such an approach may not be effective in the case of dynamic variations in search block numbers, as current draw may be less dependent upon actual bit values, and far more dependent upon power consumed by match sense amplifiers (MSAs) within a CAM. Still further, varying search key bit values does not address non-search operations, such a read/write operations. Read/write operations may be more significant power source draws than idle operations.
Another way to address such current surges can be to issue dummy commands to maintain a minimum current draw level (floor). Such techniques are disclosed in commonly-owned copending U.S. patent application Ser. No. 11/014,123, titled METHOD AND APPARATUS FOR SMOOTHING CURRENT TRANSIENTS IN A CONTENT ADDRESSABLE MEMORY (CAM) DEVICE WITH DUMMY SEARCHES, by Om et al., filed Dec. 15, 2004, now U.S. Pat. No. 7,149,101 issued on Dec. 12, 2006, and Ser. No. 11/085,399, titled METHOD AND APPARATUS FOR SMOOTHING CURRENT TRANSIENTS IN A CONTENT ADDRESSABLE MEMORY (CAM) DEVICE, by Hari Om, filed on Mar. 21, 2005, now U.S. Pat. No. 7,277,982 issued on Oct. 2, 2007. Dummy commands can raise a current floor to thereby reduce the overall dl/dt between searches.
Staggering compare operations can reduce current surges, but can introduce latency into a compare operation. In addition, activation of overall global wiring may result in some additional power consumption.
Use of dummy searches can be particularly valuable when ramping up and down from start and idle states, but may not fully address searches on block numbers that can vary dynamically.
To better understand various features of the disclosed embodiments, a conventional approaches to utilizing dummy searches will now be described.
FIG. 8 shows a search engine system 800 having a decode circuit 802 and a current control circuit 804. According to decoded functions from decoder circuit 802, current control circuit 804 can initiate dummy searches from decode circuit 802. Searches, both regular (i.e., those called for by the search command) and dummy can propagate through a pipeline to activate particular combinations of CAM arrays (e.g., CAM blocks) 806.
FIG. 7 includes two graphs 700 and 702. Graph 700 shows a number of CAM block activated in response to a particular sequence of instructions. Graph 702 shows the same search sequence of graph 700, but with the addition of a minimal “floor” value. That is, dummy searches are inserted to ensure that some minimal current is drawn in each cycle. As shown, while use of dummy searches can introduce a “floor” in current consumption, in the event a sequence activates a substantially larger number of CAM blocks than a floor value (shown by the arrow), a considerable change in dl/dt will result.
Thus, conventional CAM devices utilizing current “floors” are faced with competing requirements: dl/dt changes versus average power. That is, while raising a minimum floor may address some dl/dt changes, such approaches increase overall power consumption by activating more CAM blocks than necessary on most operational cycles